Volume 15, Issue 3 (September 2019)                   IJEEE 2019, 15(3): 343-351 | Back to browse issues page


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Abstract:   (285 Views)
In this paper two R‑L network simulator configurations employing a single VDDIBA, one resistance and one grounded capacitance are presented. The first configuration is a grounded series resistor-inductor (R‑L) network simulator and the second configuration is intended for grounded parallel resister-inductor (R‑L) circuit simulation. Both the proposed circuits enjoy several beneficial features such as: 1) compact structure employing only one VDDIBA and two passive elements, 2) electronic tuning of inductive part of realized series/parallel R‑L impedances, 3) independent control of inductive and resistive parts of realized parallel R‑L impedance, 4) no requirement of any component matching, and 5) un-deviated performance in non-ideal environment. By choosing appropriate values of active/passive elements, a series R‑L circuit for simulating resistance of 7.742 kΩ and inductance of value 7.742 mH has been developed. Similarly a parallel R‑L simulation circuit to simulate a resistance of value 1 kΩ and inductance of value 77.4 µH is implemented. To study the influence of parasitics on developed lossy inductances, the behavior of these configurations has been studied keeping terminal parasitics of VDDIBAs under consideration. To check the performance and usefulness of the proposed configurations some second-order filtering circuits have been designed. To confirm the theoretical analysis, PSPICE Simulation results have been included.
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Type of Study: Research Paper | Subject: Analog Circuits
Received: 2018/05/07 | Accepted: 2019/02/18 | Published: 2019/02/21