IRANIAN JOURNAL OF ELECTRICAL AND ELECTRONIC ENGINEERING
IJEEE
Engineering & Technology
http://ijeee.iust.ac.ir
18
agent2
1735-2827
1735-2827
en
jalali
1402
3
1
gregorian
2023
6
1
19
2
online
1
fulltext
en
Impact of Sampling Frequency on Implementation Cost and Performance of FPGA-based Digital Controller of Power Converters: Case Study for Three-Phase Four-Legs Inverters
2-VLSI
VLSI
Research Paper
Research Paper
<div style="text-align: justify;"><span style="color:#000000;"><span style="font-size:14px;"><span style="font-family:Times New Roman;">One of the problems in digital control of power converters is calculation time in each sampling instant which effect on cost and complexity of digital controller. In this paper, a formula is introduced for calculating the number of clock cycles in each sample then interaction between sampling frequency and implementation cost (number of functional units and word length) of FPGA-based digital controller of DC-AC converter (three-phase four-legs inverter) is verified. The digital architecture is built on finite set model predictive control, and implemented on the FPGA board based on fixed-point calculations. We consider two digital architectures for design the controller in this study. One with four functional units and another with six functional units. This study aims to develop a mathematical equation for the number of clock cycles in each time instant to select the best switching state in the control algorithm, which affects the sampling frequency and clock frequency. Based on the obtained results, the number of functional units, word-length, and the number of switches determine the maximum clock cycles. By knowing maximum clock cycles the maximum sampling frequency is determined. In structure with four functional units, the maximum sampling frequency is 71 kHz for WL=8 bits and 17.7 kHz for WL=32 bits, and in structure, with six functional units, the maximum sampling frequencies are 97.6 and 24.4 kHz for WL=8 and WL=32 bits, respectively. In architecture with more functional units, we have greater sampling frequency with more accuracy and cost. The results obtained from this paper can be a reference for digital controller design. </span></span></span></div>
Sampling Frequency, Digital Architecture, Functional Units, Word Length, Implementation Cost, Three-phase Inverter.
2277
2277
http://ijeee.iust.ac.ir/browse.php?a_code=A-10-4013-1&slc_lang=en&sid=1
A.
Hamidi
hamidi.a@lu.ac.ir
`1800319475328460012051`

1800319475328460012051
Yes
Electrical Engineering Department, Lorestan University, Khorram Abad, Iran
S.
Karimi
shahramkarimi@razi.ac.ir
`1800319475328460012052`

1800319475328460012052
No
Electrical Engineering Department, Razi University, Kermanshah, Iran
A.
Ahmadi
ArashAhmadi3@cunet.carleton.ca
`1800319475328460012053`

1800319475328460012053
No
Department of Electronics, Carleton University, Ottawa, Canada