Volume 19, Issue 4 (December 2023)                   IJEEE 2023, 19(4): 117-123 | Back to browse issues page


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Abstract:   (681 Views)
In the past twenty years, low-voltage and power design have gained attention in analog VLSI design, particularly for high-performance and portable integrated circuits (ICs). Because of the increasing density of large-scale integration, a single silicon A.S.I. chip could have thousands or even millions of transistors on it. A rise in integration levels led to the development of Fin-type Field Effect Transistor (FinFETs) technology. In this research, an improved circuit design for a floating active inductor (FAI) and quadrature sinusoidal oscillator (QSO) is implemented employing only two active filters, the Z-copy-Voltage Differential Transimpedance Amplifier (Zc-VDTA). The purpose of the FAI is to contain two Zc-VDTA and one resistor with a ground capacitor, and it is easy to integrate the parameters of the Zc-VDTA bias current (IB) through the adjustment of the circuit. In order to verify the dependability of the circuits designed using floating active inductance circuits, a Butterworth fourth-order low-pass filter was created via component replacement. All the simulations have been carried out on 7 nm using linear technology SPICE, and cadence virtuoso tool.
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Type of Study: Research Paper | Subject: Analog Circuits
Received: 2023/04/10 | Revised: 2024/04/20 | Accepted: 2023/12/27

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