Iranian Journal of Electrical and Electronic Engineering
Iran University of Science and Technology
Thu, Jul 18, 2024
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Volume 1, Issue 4 (October 2005)
IJEEE 2005, 1(4): 15-22 |
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A. Banaei, S. Samavi, E. Nasr Esfahani. Lossless Microarray Image Compression by Hardware Array Compactor. IJEEE 2005; 1 (4) :15-22
URL: http://ijeee.iust.ac.ir/article-1-59-en.html
URL: http://ijeee.iust.ac.ir/article-1-59-en.html
Abstract: (12749 Views)
Microarray technology is a new and powerful tool for concurrent monitoring of
large number of genes expressions. Each microarray experiment produces hundreds of
images. Each digital image requires a large storage space. Hence, real-time processing of
these images and transmission of them necessitates efficient and custom-made lossless
compression schemes. In this paper, we offer a new architecture for lossless compression of
microarray images. In this architecture, we have used a dedicated hardware for separation
of foreground pixels from the background ones. By separating these pixels and using
pipeline architecture, a higher lossless compression ratio has been achieved as compared to
other existing methods
Type of Study: Research Paper |
Received: 2008/10/13 | Revised: 2008/10/13 | Accepted: 2008/10/13
Received: 2008/10/13 | Revised: 2008/10/13 | Accepted: 2008/10/13
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