Volume 10, Number 1 (March 2014)                   IJEEE 2014, 10(1): 38-44 | Back to browse issues page

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Piry M, Khanjani Moaf M, Amiri P. A New Low-Voltage, Low-Power and High-Slew Rate CMOS Unity-Gain Buffer. IJEEE. 2014; 10 (1) :38-44
URL: http://ijeee.iust.ac.ir/article-1-615-en.html

Abstract:   (1414 Views)
Class-AB circuits, which are able to deal with currents several orders of magnitude larger than their quiescent current, are good candidates for low-power and high slew-rate analog design. This paper presents a novel topology of a class AB flipped voltage follower (FVF) that has better slew rate and the same power consumption as the conventional class-AB FVF buffer previously presented in literature. It is thus suitable for low-voltage and low-power stages requiring low bias currents. These buffers have been simulated using 0.5µm CMOS Technology models provided by IBM. The buffer consumes 20µA from a 0.9V supply and has a bandwidth of 50MHz with a 18pF load. It has a slew rate of 9.8V/µs and power consumption of 42µw
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Type of Study: Research Paper | Subject: Microelectronics
Received: 2013/08/7 | Accepted: 2014/03/12 | Published: 2014/03/12

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