Volume 10, Issue 1 (March 2014)                   IJEEE 2014, 10(1): 38-44 | Back to browse issues page

XML Print

Download citation:
BibTeX | RIS | EndNote | Medlars | ProCite | Reference Manager | RefWorks
Send citation to:
Piry M, Khanjani Moaf M, Amiri P. A New Low-Voltage, Low-Power and High-Slew Rate CMOS Unity-Gain Buffer. IJEEE 2014; 10 (1) :38-44
URL: http://ijeee.iust.ac.ir/article-1-615-en.html
A New Low-Voltage, Low-Power and High-Slew Rate CMOS Unity-Gain Buffer
M. Piry , M. Khanjani Moaf , P. Amiri
Abstract:   (5411 Views)
Class-AB circuits, which are able to deal with currents several orders of magnitude larger than their quiescent current, are good candidates for low-power and high slew-rate analog design. This paper presents a novel topology of a class AB flipped voltage follower (FVF) that has better slew rate and the same power consumption as the conventional class-AB FVF buffer previously presented in literature. It is thus suitable for low-voltage and low-power stages requiring low bias currents. These buffers have been simulated using 0.5µm CMOS Technology models provided by IBM. The buffer consumes 20µA from a 0.9V supply and has a bandwidth of 50MHz with a 18pF load. It has a slew rate of 9.8V/µs and power consumption of 42µw
Keywords: Flipped Voltage Follower , Class-AB Circuits , Level Shifting Techniques , High Slew Rate Buffers , CMOS Integrated Circuits
Full-Text [PDF 1758 kb]   (4751 Downloads)    
Type of Study: Research Paper | Subject: Microelectronics
Received: 2013/08/07 | Revised: 2014/03/15 | Accepted: 2014/03/12
Rights and permissions
Creative Commons License This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.
Creative Commons License
© 2022 by the authors. Licensee IUST, Tehran, Iran. This is an open access journal distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) license.